Single Transistor Amplifier (Common-Emitter)

Experiment: Single Transistor Amplifier

1. Aim

To build and test a single-stage common-emitter transistor amplifier, measure its input/output waveforms, and observe how bias point and input amplitude affect gain and distortion.

2. Apparatus / Components Required

• SEELab3 unit
• NPN transistor (recommended: 2N2222)
• Bias resistor: 100 kOhm (base bias from PV2)
• Signal divider resistors: 1 kOhm and 2.2 kOhm (to attenuate WG signal)
• Coupling capacitor for base input (AC coupling)
• Collector and emitter resistors as per your standard amplifier setup
• Breadboard and connecting wires
• PC / mobile running SEELab3 interface

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3. Theory & Principle

This experiment uses a common-emitter (CE) transistor amplifier. The input AC signal is applied to the base through a coupling capacitor so that the DC bias condition is not disturbed.

Because CE gain can be high, a small input signal is needed to avoid clipping. The ExpEYES method uses a 1 kOhm : 2.2 kOhm divider to reduce the waveform-generator signal to around a few tens of millivolts at the base input.

The transistor operating point (Q-point) is set by base bias through a 100 kOhm resistor, controlled by PV2:

• If bias is too low -> cut-off during part of the cycle (bottom clipping).
• If bias is too high -> saturation during part of the cycle (top clipping).
• At proper bias -> maximum undistorted output swing.

Why small input is important

For linear amplification, the transistor must stay in active region over the signal cycle. If input amplitude is too high, the instantaneous operating point enters cut-off/saturation, causing waveform distortion.

4. Circuit Diagram / Setup

1. Build the CE amplifier wiring as in the output-characteristics style circuit (collector resistor, emitter to ground path, base bias through 100 kOhm).
2. Connect WG output to a divider network using 1 kOhm and 2.2 kOhm.
3. Feed the attenuated signal to the transistor base through a coupling capacitor.
4. Monitor:
   • A2 -> input signal at base side (after divider/coupling).
   • A1 -> output signal at collector.
5. Use PV2 to adjust base bias for minimum distortion.

SEELab3 note

SEELab3 allows reducing WGbar amplitude using an external gain resistor. A 100 Ohm resistor can reduce approximately 3 V to around 30 mV, suitable for low-distortion transistor amplification.

5. Procedure

1. Power the setup and open the relevant transistor amplifier tool/scope view in SEELab3.
2. Start with a low-frequency sine input (for example, 500 Hz to 1 kHz).
3. Keep input amplitude small using the divider (or WGbar attenuation method).
4. Observe input on A2 and output on A1.
5. Slowly vary PV2:
   • find a bias point where output is centered and least distorted.
6. Increase input amplitude gradually and note onset of clipping.
7. Record waveforms and estimate voltage gain:

1. Try these improvements and compare:
   • lower input amplitude,
   • higher collector supply (if external safe supply is used),
   • lower-gain transistor.

6. Observation Table

7. Results and Discussion

• The CE stage produced an amplified output with phase inversion (approximately 180 degrees) relative to input.
• Best amplification occurred at an intermediate base bias where clipping was minimal.
• At low bias the output showed cut-off clipping; at high bias it showed saturation clipping.
• Measured voltage gain was $A_v =$ ____ under near-linear conditions.

8. Precautions

1. Keep input small; CE stages distort quickly for large base drive.
2. Always use coupling capacitor at base input to prevent bias shift by WG DC component.
3. Verify transistor pinout before powering the circuit.
4. Do not exceed safe collector current or device power limits.
5. Ensure common ground between SEELab3 and the circuit.

9. Troubleshooting